G900 MemoryMap
Материал из G900
Memory Map
offset | size | mmap I/O | Description |
---|---|---|---|
0x0000_0000 | PXA SC0 | 0x0000_0000 |
DMA
WIN MOB Setting
Регистр | Имя | Значение | Значение | Description |
---|---|---|---|---|
0x4000_00E0 | DRQSR0 | 0x00000000 | DMA DREQ<0> Status register | |
0x4000_00E4 | DRQSR1 | 0x00000000 | DMA DREQ<1> Status register | |
0x4000_00E8 | DRQSR2 | 0x00000000 | DMA DREQ<2> Status register | |
0x4000_0130 | DRCMR12 | 0x00000081 | Request to Channel Map register for AC ’97 audio transmit request | |
0x4000_013C | DRCMR15 | 0x00000089 | Request to Channel Map register for SSP2 receive request | |
0x4000_0140 | DRCMR16 | 0x00000088 | Request to Channel Map register for SSP2 transmit request | |
0x4000_0154 | DRCMR21 | 0x00000094 | Request to Channel Map register for MMC/SDIO receive request | |
Channel 1 | ||||
0x4000_0004 | DCSR1 | 0x00000108 |
|
DMA Control/Status register for Channel 1 |
0x4000_0210 | DDADR1 | 0xa0f53001 |
|
DMA Descriptor Address register for Channel 1 |
0x4000_0214 | DSADR1 | 0xa0f54000 |
|
DMA Source Address register for Channel 1 |
0x4000_0218 | DTADR1 | 0x40500040 |
|
DMA Target Address register for Channel 1 |
0x4000_021C | DCMD1 | 0x9043c000 |
|
DMA Command Address register for Channel 1 |
Channel 8 | ||||
0x4000_0020 | DCSR8 | 0x40000008 |
|
DMA Control/Status register for Channel 8 |
0x4000_0280 | DDADR8 | 0x00000000 | DMA Descriptor Address register for Channel 8 | |
0x4000_0284 | DSADR8 | 0xb2f62f0c | DMA Source Address register for Channel 8 | |
0x4000_0288 | DTADR8 | 0x41700010 | DMA Target Address register for Channel 8 | |
0x4000_028C | DCMD8 | 0x90014000 |
|
DMA Command Address register for Channel 8 |
Channel 9 | ||||
0x4000_0024 | DCSR9 | 0x40000008 |
|
DMA Control/Status register for Channel 9 |
0x4000_0290 | DDADR9 | 0x00000000 | DMA Descriptor Address register for Channel 9 | |
0x4000_0294 | DSADR9 | 0x41700010 | DMA Source Address register for Channel 9 | |
0x4000_0298 | DTADR9 | 0xb2eef70c | DMA Target Address register for Channel 9 | |
0x4000_029C | DCMD9 | 0x60214000 |
|
DMA Command Address register for Channel 9 |
Channel 20 | ||||
0x4000_0050 | DCSR20 | 0x40000008 |
|
DMA Control/Status register for Channel 20 |
0x4000_0340 | DDADR20 | 0x00000000 | DMA Descriptor Address register for Channel 20 | |
0x4000_0344 | DSADR20 | 0x41100040 | DMA Source Address register for Channel 20 | |
0x4000_0348 | DTADR20 | 0xa0f5d000 | DMA Target Address register for Channel 20 | |
0x4000_034C | DCMD20 | 0x6003c000 |
|
DMA Command Address register for Channel 20 |