DiskOnChip — различия между версиями

Материал из G900
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(Toshiba mDoC)
 
(не показаны 3 промежуточные версии этого же участника)
Строка 1: Строка 1:
==Toshiba mDoC==  
+
'''[ [[Toshiba G900]] ] | [ [[Toshiba G900 TODO|TODO]] ] | [ [[FAQ|FAQ]] ] | [ [[Toshiba G900 Technical Specification| Характеристики]] ] | [ [[kernel compile| Компиляция ядра]] ] | [ [[Android compile| Компиляция Андройда]] ] '''
ms25-d10sd9-b3-p = RAM 64 + DOC G4 1Gbit(128MB)
+
 
 +
==Toshiba g900 mDoC==  
 +
ms25-d10sd9-b3-p = RAM 512Mbit(64MB) + DOC G4 1Gbit(128MB)
  
 
ardress = 0x0000_0000
 
ardress = 0x0000_0000
Строка 32: Строка 34:
 
||+0800 || 0x800 ||*  || RW || data window  
 
||+0800 || 0x800 ||*  || RW || data window  
 
|-
 
|-
||+1000 || short ||*  || RO || chipid_0<code>0x400  
+
||+1000 || short ||*  || RO || chipid_0 <code>0x400  
 
|-
 
|-
 
||+1004 || byte  ||*  || RW || test  
 
||+1004 || byte  ||*  || RW || test  
Строка 86: Строка 88:
 
||+1072 || byte  ||*  || RW || DoC control confirmation  
 
||+1072 || byte  ||*  || RW || DoC control confirmation  
 
|-
 
|-
||+1074 || short ||*  || RO || chipid_1 (G3</code>0xfdff(<nowiki>200),</nowiki> G4=0xfbff(<nowiki>400))</nowiki>  
+
||+1074 || short ||*  || RO || chipid_1 (G3 </code>0xfdff( <nowiki>200),</nowiki> G4=0xfbff( <nowiki>400))</nowiki>  
 
|-
 
|-
 
||+1076 || byte  || - || R+ || (orr 0x80, 0xc3)  
 
||+1076 || byte  || - || R+ || (orr 0x80, 0xc3)  
Строка 96: Строка 98:
 
||+107c || byte  ||*  || RW || DPD  
 
||+107c || byte  ||*  || RW || DPD  
 
|}
 
|}
----  
+
----
 +
 
 
==DoC G4_2 registers==  
 
==DoC G4_2 registers==  
 
----  
 
----  

Текущая версия на 20:32, 22 июня 2011

[ Toshiba G900 ] | [ TODO ] | [ FAQ ] | [ Характеристики ] | [ Компиляция ядра ] | [ Компиляция Андройда ]

Toshiba g900 mDoC

ms25-d10sd9-b3-p = RAM 512Mbit(64MB) + DOC G4 1Gbit(128MB)

ardress = 0x0000_0000

MSC (Static Memory Control Registers )

CS0

MSC0{0,16} = 10011000 10001000
ROM Type = Synchronous flash or non-burst ROM or non-burst flash
ROM Bus Width = 16 bits
ROM Delay First Access = 0b1000
Delay Next Access = 0b1000
ROM/SRAM Recovery Time = 0b001
RBUFFx = Faster device (streaming behavior)



DoC G4_1 registers


offset length documented read/write Description
+0000 0x800 * RW .text
+0800 0x800 * RW data window
+1000 short * RO chipid_0 0x400
+1004 byte * RW test
+1008 short * RW endian control
+100a byte * RW device id select
+100c byte * RW DoC control
+100e byte * RW configuration
+1010 short * RW interrupt control
+1014 byte * RW output control
+101a short * RW read address
+101c short * RW multiburst mode control
+101e byte - W 0x0
+1020 byte * RW interrupt status
+1022 byte - W+
+1032 byte - W FlashSelect : 0xe, 0x12, 0x0, 0x9, (0x31,0x1d, 0x27-erase)
+1034 byte - W FlashCmd : 0x30, 0x5, 0xe0, 0x60, 0x22, (0x3c, 0xa2, 0x50, 0xff, 0x71, 0x80, 0x11,0xd0-erase)
+1036 byte - W FlashAddr
+1038 byte - RW FlashCtrl: w 0x39, r &0x6
+103a short - R read data from flash
+103e short * W NOP (write here causes a delay)
+1040 short - (R)W 0x8a0f
+1042 byte - R tst 0x80 (tst 0x20 -hamm)
+1044 byte - W+ 0
+1046 byte - R+ hamm
+1056 byte - RW+ (orr 0x8)
+105c byte - W+
+106c byte - R+
+1072 byte * RW DoC control confirmation
+1074 short * RO chipid_1 (G3 0xfdff( 200), G4=0xfbff( 400))
+1076 byte - R+ (orr 0x80, 0xc3)
+1078 short * RW dma control 0
+107a short * RW dma control 1
+107c byte * RW DPD

DoC G4_2 registers


offset length documented read/write Description
+0000 0x800 * RW .text
+0800 0x800 * RW data window
+201000 short * RO chipid_00x400
+201004 byte * RW test
+201008 short * RW endian control
+20100a byte * RW device id select
+20100c byte * RW DoC control
+20100e byte * RW configuration
+201010 short * RW interrupt control
+201014 byte * RW output control
+20101a short * RW read address
+20101c short * RW multiburst mode control
+20101e byte - W 0x0
+201020 byte * RW interrupt status
+201022 byte - W+
+201032 byte - W FlashSelect : 0xe, 0x12, 0x0, 0x9, (0x31,0x1d, 0x27-erase)
+201034 byte - W FlashCmd : 0x30, 0x5, 0xe0, 0x60, 0x22, (0x3c, 0xa2, 0x50, 0xff, 0x71, 0x80, 0x11,0xd0-erase)
+201036 byte - W FlashAddr
+201038 byte - RW FlashCtrl: w 0x19, r 0x6
+20103c short - R  ?
+20103e byte * W NOP (write here causes a delay)
+201040 short - (R)W 0x920f
+201042 byte - R tst 0x80 (tst 0x20 -hamm)
+201044 byte - W+ 0
+201046 byte - R+ hamm
+201050 short - R  ? 3c related
+201056 byte - RW+ (orr 0x8)
+20105c byte - W+
+20106c byte - R+
+201072 byte * RW DoC control confirmation
+201074 short * RO chipid_1 (G30xfdff(200), G4=0xfbff(400))
+201076 byte - R+ (orr 0x80, 0xc3)
+201078 short * RW dma control 0
+20107a short * RW dma control 1
+20107c byte * RW DPD

ссылки

регистры и описание http://forum.xda-developers.com/wiki/index.php?title=HTC_DiskOnChip